The surface-barrier region
In a surface-barrier cell, energy level and densities of states differences （effective forces） can play a role along with the electrostatic field and band bending in the semiconductor surface in breaking symmetry and in
making one direction different from the other. While the electrochemical potential difference between the barrier-former and the semiconductor prior to contact always establishes VBi, a complication that arises in surface-barrier cells is that VBi may not always completely manifest itself as band bending in the semiconductor. Some band bending may lie across the surface layer we were just discussing. Figure 6.1b shows an example where some of the VBi is being developed across a surface layer, as can be seen from the sloped band edges in the layer. As noted, this surface layer seen in Figure 6.1b can be a purposefully introduced intermediate layer, giving an M-I-S device, or it can be present inadvertently—for example, due to chemical reactions or interdiffusion. As we have mentioned, in the latter case the surface layer is usually very defective, giving rise to gap states that can store charge but also render the layer transparent to carrier motion. This may occur due to hopping transport. If the layer is thin enough, it may be completely transparent to carriers, due to tunneling, yet still store charge in the gap states. Charge in the gap states in defective layers develops an electrostatic field across the surface layer, producing band bending in the layer. This band bending, together with the band bending in the semiconductor, must total VBi in TE. When a surface layer and a semiconductor-surface layer localized state gap distribution are present, all we know from thermodynamics is that the band bending in the semiconductor plus that in the surface layer must equal VBi at TE. Since the charge in the gap states could even result in band bending in the surface layer that is in opposite sense to that in the semiconductor （the states can be donor or acceptor-like）， it is possible that the net result is that the semiconductor band bending component is larger than VBi. Determining the free carrier populations and the gap-state populations and their charge contributions and working out how VBi finally translates into band bending in a surface-barrier cell semiconductor at TE necessitates, in general, a numerical approach to solving Poisson's equation （Eq. 2.45 in Section 2.3.4）. Solving this equation then gives the width of the field region and the functional dependencies EC（x）， EV（x）， Evl（x）， and （x） in TE and allows watching their evolution as a function of voltage V. Computer analysis, of course, does all this for us.
This discussion allows us to return to the concept of Fermi-level pinning, which first came up in Section 3.2.2. This phenomenon can occur whenever the Fermi level is in, or is approaching, an energy range with a very high density of states. In the surface-barrier devices under discussion,we consider the situation for which there is a surface layer （of the inadvertent or intermediate type） present and a high surface-layer gap-state density centered at some energy 4>0 at the surface layer-semiconductor interface. In such a case, changing the barrier-former and thereby changing VBi may not move the Fermi level from 4>0 at the physical location of these gap states. All the change in the total band bending, which must occur with barrier-former workfunction change, can take place across the surface layer, because, if there were the slightest shift in energy by the Fermi level at the position of the localized states, it would cause huge changes in the interface state occupancy and therefore huge changes in the charge developed. Thus, the Fermi level is said to be pinned—it does not have to move much in energy at the spatial location of these gap states to adapt to any change required in the electric field.29 It must be stressed that Fermi-level pinning can render changing the electrochemical potential of the barrier-former useless in terms of trying to modify the barrier inside the semiconductor.